FAULT CHARACTERIZATION AND TESTABILITY ISSUE OF LOW CAPACITANCE FULL-SWING BiCMOS LOGIC CIRCUITS

Behavior of low capacitance full-swing BiCMOS logic gate under various single stuck faults has been investigated in this paper. Results show that more than 65% stuck-on faults in logic circuits can be detected by monitoring the power supply current popularly known as IDDQ testing, but no logic monitoring is possible. Stuck-open faults in the logic MOS devices are detectable by logic monitoring using appropriate two-pattern test but stuck-open faults in the bipolar drivers are masked by the additional MOS devices used to attain full output logic swing.